Wall structures in an integrated circuit device typically separate different sections of circuitry and/or seal certain sections of circuitry from external ambient conditions. As disclosed, for example, in certain embodiments of U.S. Pat. No. 6,777,767 and United States published patent application 2005/0095835, the disclosures of which are incorporated by reference herein, a wall is provided around an image sensor region of an integrated circuit device. In some instances, an image sensor is provided on a substrate, a substantially transparent or translucent lid is positioned above the image sensor and a wall is provided that extends from the substrate to the lid. In such applications, the wall, in conjunction with the lid, helps prevent contamination from reaching the image sensor region by sealing that region from ambient conditions. The walls may support the lid above the surface of the integrated circuit device. Walls are similarly used in devices that include microelectromechanical systems (MEMs), surface acoustic wave (“SAW”) devices and other structures.
Integrated circuit chips typically are made as portions of a wafer including many chips, which is then severed to provide the individual chips. Typically, it is desirable to place the walls and the lids on the chips before severing the wafer. For example, wafer-size lid element can be assembled with the wafer. The walls may be formed as a separate element which is placed between the lid and the wafer, or may be provided by etching the lid to form walls projecting from the lid. It would be desirable to provide an economical process for forming walls. However, the walls must be of substantially uniform height, and must be placed precisely so that the walls do not interfere with the function of the chips. For example, in the case of image sensor chips, the walls should not overlie the sensing elements on the chip. The need for accurate placement of the walls is made more acute by the small size of the chips and formation of the chips in close proximity to one another on the wafer.